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Wednesday, April 4, 2007

Coming in 2008: Intel's next generation microarchitecture

Intel's architecture and silicon technology advancements are based on a rapid that delivers an accelerated pace of innovation in driving processor performance and energy efficiency for the next decade and beyond. Intel calls this cadence the "tick-tock" model of silicon and microarchitecture. Each "tick" represents a new silicon process technology with an enhanced microarchitecture. The corresponding "tock" represents the design of a brand new microarchitecture. The cycle repeats approximately every two years.
The Penryn family, with its 45nm Hi-k silicon technology, is the latest "tick" and includes many microarchitecture innovations to Intel Core microarchitecture. Coming in 2008 is the following "tock," Intel's next brand new microarchitecture codenamed "Nehalem."
Nehalem is a truly dynamic- and design-scalable microarchitecture. It will deliver both performance on demand and optimal price/performance/energy efficiency for each platform.Nehalem's dynamic scalability includes:
  • Dynamically managed cores, threads, cache, interfaces, and power
  • Leveraging leading 4 instruction issue Intel Core microarchitecture technology (Intel Core microarchitecture's ability to process up to 4 instructions per clock cycle on a sustained basis as compared to 3 instructions per clock cycle or less for other processors)
  • Simultaneous multi-threading (Intel Hyper-Threading Technology) to enhance performance and energy efficiency
  • Innovative new Intel® SSE4 and ATA instruction set architecture additions
    Superior multi-level shared cache that leverages Intel® Smart Cache technology
  • Leadership system and memory bandwidth
  • Performance-enhanced dynamic power management

Nehalem's design scalability will enable optimal price/performance/energy efficiency for each market segment through:

  • New system architecture for next generation Intel processors and platforms
  • Scalable performance for from one-to-sixteen (or more) threads and from one-to-eight (or more) cores
  • Scalable and configurable system interconnects and integrated memory controllers
  • High performance integrated graphics engine for client platforms

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